Scalable low bandwidth multicast handling in mixed core systems

ABSTRACT

A method and apparatus for multicast handling in mixed core systems have been described.

FIELD OF THE INVENTION

[0001] The present invention pertains to communication. More particularly, the present invention relates to a method and apparatus for multicast handling in mixed core systems.

BACKGROUND OF THE INVENTION

[0002] In communication and/or computer systems, it is common for data or information to be sent to multiple destinations or targets. This is may be accomplished by using a broadcast command to notify all targets that they are the intended recipients of the data. However, if only a subset of targets are the intended recipients then it is common to replicate the data and then send multiple requests on the interconnect for each intended target. These multiple requests on the interconnect may consume additional time, additional bandwidth, and additional system resources. This may present a problem.

BRIEF DESCRIPTION OF THE DRAWINGS

[0003] The present invention is illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements and in which:

[0004]FIG. 1 illustrates a network environment in which the method and apparatus of the present invention may be implemented;

[0005]FIG. 2 is a block diagram of a computer system;

[0006]FIG. 3 shows an older method for reaching all targets;

[0007]FIG. 4 shows an older method for reaching multiple targets;

[0008]FIG. 5 illustrates one embodiment of the present invention for reaching multiple different targets using one request;

[0009]FIG. 6 illustrates one embodiment of the present invention where multiple targets accept the request;

[0010]FIG. 7 shows an example of one embodiment of the present invention accessing two agents out of the four possible target agents in the system;

[0011]FIG. 8 illustrates on embodiment of the present invention for cascade multicasting;

[0012]FIG. 9 illustrates one embodiment of the present invention where a broadcast command is received, and then mapped to a write command;

[0013]FIG. 10 illustrates one embodiment of the present invention where a broadcast command is mapped to a different address space;

[0014]FIG. 11 illustrates one embodiment of the present invention showing an example of two threads interleaved at the target agent;

[0015]FIG. 12 illustrates one embodiment of the present invention showing a burst;

[0016]FIG. 13 illustrates one embodiment of the present invention showing burst interleaving;

[0017]FIG. 14 illustrates one embodiment of the present invention showing multiple queues;

[0018]FIG. 15 illustrates another embodiment of the present invention showing multiple queues having mixed nonbackpressure and backpressure threads; and

[0019]FIG. 16 illustrates another embodiment of the present invention showing multiple queues.

DETAILED DESCRIPTION

[0020] A method and apparatus for scalable low bandwidth multicast handling in mixed core systems are described.

[0021]FIG. 1 illustrates a network environment 100 in which the techniques described may be applied. The network environment 100 has a network 102 that connects S servers 104-1 through 104-S, and C clients 108-1 through 108-C. More details are described below.

[0022]FIG. 2 illustrates a computer system 200 in block diagram form, which may be representative of any of the clients and/or servers shown in FIG. 1. More details are described below.

[0023] The present invention, in one embodiment, deals with a technique to extend the broadcast semantics to specify a subset of all possible targets in a system. In yet another embodiment of the present invention, the technique described applies to any system where a request needs to be sent to multiple targets. In yet another embodiment of the present invention, is described a technique to minimize the interconnect bandwidth needed to make the transfer, and for the transfer to complete in all agents substantially simultaneously.

[0024]FIG. 3 shows an older method 300 for reaching all targets. Note that this method cannot reach a subset only, and requires that the targets have a “broadcast” understanding. At 302 a request is created, at 304 the request is broadcast to all targets. At 306 a check is made to see if there are other requests. If there are no other requests, then the method is ended 308. If there are other requests (as checked at 306), then loop back to 302 and create a request.

[0025]FIG. 4 shows an older method 400 for reaching multiple targets. Note that this method uses two loops and requires multiple sending of a single request (one to each target). At 402 a request is created, at 404 the request is sent to one of the targets. At 406 a check is made to see if there are other targets. If there are other targets (as checked at 406), then loop back to 402 and create a request. If there are no other targets for this request (as checked at 406), then at 408 a check is made to see if there are any more requests 408. If there are no more requests (as checked at 408), then the method is ended 410. If at 408 there are more requests, then loop back to 402 and create a request.

[0026]FIG. 5 illustrates one embodiment 500 of the present invention for reaching multiple different targets using one request. At 502 broadcast groups are defined. At 504 broadcast group registers in targets are defined. At 506 a request is created, at 508 the broadcast group is chosen, and at 510 the request is sent. At 512 a check is made to see if there are other requests. If there are no other requests, then the method is ended 514. If there are other requests (as checked at 512), then loop back to 506 and create a request.

[0027]FIG. 6 illustrates one embodiment 600 of the present invention where multiple targets accept the request. At 602 the broadcast group is extracted from the request, then the broadcast group is expanded into a bit vector 604, and at 606 the broadcast group bit vector is compared with a broadcast group register vector. Next, a check is made to see if the comparison at 606 results in a match 608. If the is no match, then other operations may be done, for example at 610 the request is ignored. If there is a match at 608, then the request is accepted 612. Next, the request accepted (at 612) is examined with respect to the core capability 614. The result of this examination (at 614) is one of three results. If the result is that the core requires mapping, then at 620 the attributes are mapped to match the core 620, the mapped attributes request is sent 616, and process is ended 618. If the result of this examination (at 614) is that a cascaded broadcast is needed, then at 622 sub-broadcast groups are created, the sub-broadcast groups request is sent 616, and process is ended 618. If neither a mapping nor broadcast is needed (as determined at 614), then the request is sent 616, and the process is ended 618.

[0028] In one embodiment of the present invention, a system may be comprised of multiple cores that communicate over an interconnect. Attached to each core may be an agent that communicates on each core's behalf over the interconnect. Broadcast groups are defined to indicate whether an agent is the intended target for a broadcast command. Some bits of the address may be used to indicate a broadcast group. Each agent may be part of one or more target groups. The set of target groups that an agent is part of is determined via a bit vector stored in configuration registers called broadcast group registers. These registers may be local to each agent. Each agent decodes the address bits and compares the result with the values stored in the broadcast group registers; if the corresponding bit is set, then the agent is an intended target for the request otherwise it is not.

[0029]FIG. 7 shows an example of one embodiment 700 of the present invention accessing two agents (706 and 712) out of the four possible target agents (706, 708, 710, and 712) in the system. The set of targets to be addressed by a broadcast command (from for example, Initiator 702) is defined by setting up the broadcast group registers in each agent (706-R, 708-R, 710-R, and 712-R respectively for targets 706, 708, 710, and 712). The first agent's (Target #1, 706) broadcast group register 706-R indicates it is part of groups 3, 6 and 7 (MSB . . . LSB order); agent 2 (708) is part of groups 0 and 1 (see 708-R); agent 3 (710) is part of group 5 (see 710-R); and agent 4 (712) is part of all possible groups (see 712-R). In this example, it is assumed that there are a maximum of 8 groups however this may scale up/down to any number. For example, the three top most address bits (MSB) of the broadcast request is 110 indicating that all targets that are part of group 6 are the intended targets. As a result, agents 1 (706) and 4 (712) will pick up the request but the other agents (708 and 710) won't. As illustrated, the Initiator 702 broadcasts a request with Addr[31:29]=110. The initiator and targets communicate via link 704. The decoded broadcast address (Addr[31:29]=110) (assuming in this example a 32 bit address) is shown at the row denoted 716. Broadcast registers are shown (for targets 1-4) in the row denoted at 714. Row 718 denotes the result of the broadcast group address and the broadcast group registers. Note that in this example embodiment of the present invention, the broadcast request was on the upper address lines. Other embodiments may also be used, for example, other address lines, data lines, control lines, out-of-band lines, dedicated lines, etc.

[0030]FIG. 8 illustrates on embodiment 800 of the present invention for cascade multicasting. At 802 a multicast is received, at 804 a check is made to see if the multicast is intended for the core. If the multicast is not intended for the core then the multicast is ignored 808. If the multicast is intended for the core (as determined at 804), then the multicast is transmitted within the core 806. This process (FIG. 8) may be cascaded for blocks or regions of a core. That is, a receiver of the transmitted multicast with the core (like from 806), may then treat this as a received a multicast (like at 802) and “cascade” the multicast on. Another example of cascade multicasting was discussed above as illustrated in FIG. 6 at 622 where sub-broadcast groups are created. Recall, if the result of the examination at 614 was that a cascaded broadcast was needed, then at 622 sub-broadcast groups are created, the sub-broadcast groups request is sent 616, and process is ended 618.

[0031] Some devices may not be able to receive a broadcast command and process it. In this case then, a mapping to another command and/or sequence understood by the device may be necessary. FIG. 9 illustrates one embodiment 900 of the present invention where a broadcast command is received 902, and then mapped to a write command 904. Another example of mapping was discussed above as illustrated in FIG. 6 where attributes were mapped to match the core 620.

[0032] Devices may not reside in the same address space. In this case then, a mapping from one address space to another address space may be necessary. FIG. 10 illustrates one embodiment 1000 of the present invention where a broadcast command is mapped to a different address space 1008. Next a check is made to see if the broadcast command is headed to another address space. If not, then no address mapping is done 1006. If the broadcast command is headed to another address space, then at 1008 the broadcast command is mapped to another address space.

[0033] Note also, that a combination of broadcast command mapping and address space mapping may be necessary.

[0034] A burst is an ordered sequence of requests, where the requests have a deterministic address sequence. FIG. 12 illustrates one embodiment 1200 of the present invention showing a burst. Note that the burst has requests that are in an ordered sequence. Being sent in time in the following order are A0, A1, A2, . . . , Alast (1202-0, 1202-1, 1202-2, . . . , 1202-LAST respectively) where A0 is first in time, A1 next, etc.

[0035] There is no atomicity guarantee on a burst of requests. On any given physical interface, each request in a burst may be interleaved with other requests from other initiators. FIG. 13 illustrates one embodiment 1300 of the present invention showing burst interleaving. Multiple bursts (A, B, and C) as may be seen are interleaved. A0 1302 is first in time, and Clast is last. The multiple burst in transition are: A0, A1, B0, A2, B1, C0, C1, C2, Alast, Blast, C3, and Clast (1302 through 1324 respectively). In order to tell the requests apart on the interface they are sharing, the concept of a thread is needed. Each open burst is assigned a thread identifier, and so the sequence of requests within a thread (i.e. with the same thread identifier) is still the ordered (non-interleaved) sequence of requests making up the burst. For example, in FIG. 13, burst A may be assigned to thread 1, burst B may be assigned to thread 2, and burst C may be assigned to thread 3. Given this assignment, we will see the sequence A0, A1, A2, Alast on thread 1; B0, B1, and B last on thread 2; and C1, C2, C3, and Clast on thread 3.

[0036]FIG. 11 illustrates one embodiment 1100 of the present invention showing an example of two bursts (A and B) interleaved on the link 1110 between target agent 1108 and core 1112. Initiator A is sending a burst A0, A1, A2, A3, and A4. Initiator B is sending a burst B0, B1, and B2. The first portion of the burst (A0 at 1112-1, and B0, B1 at 1112-2) is delivered to the target core 1112 before assembling the entire burst (i.e. don't need to assemble all of A0, A1, A2, A3, A4 or B0, B1, B2). The second burst is shown to have transferred to the target agent 1108 (i.e. the Initiator B has sent the entire burst B0, B1, B2 and they have been received by the agent 1108 (some also transferred to the core 1112). As shown in FIG. 11, the Initiators A and B are communicating with the target agent 1108 via link 1106. The target agent 1108 is communicating with the core 1112 via link 1110. At the point in time illustrated in FIG. 11, part of Initiator A's burst, A4 is on the link 1106. That is, it has left Initiator A but has not yet been received by target agent 1108. A1 has been sent by target agent 1108 over link 1110 but has not yet been received by the core 1112. Two threads are needed on link 1110 in order to allow the two bursts A and B to be interleaved on the link, while still maintaining the request sequence within each thread. The queue 1108-1 used to store requests in the target agent for delivery to the core 1112 may or may not be shared amongst threads, depending on the characteristics of the threads.

[0037] If the target is guaranteed to always accept certain threads without exerting any backpressure or flow control, then those threads are designated nobackpressure threads. A target agent queue (such as 1108-1 in FIG. 11) may be shared amongst several threads, if those threads are all no-backpressure threads. Sharing a queue saves cost (such as buffer area, logic, power, etc.). Regular threads (i.e. those where the target may exert backpressure or flow control) may not share an agent queue, because one thread could be blocked on the interface and would then impede the progress of all other threads sharing the target agent queue.

[0038]FIG. 14 illustrates one embodiment 1400 of the present invention showing multiple queues (A, B, and C, 1402, 1404, and 1406 respectively). Queues A 1402, B 1404, and C1406 may be considered part of an agent. There may be a need for multiple queues based upon different quality of server (QOS) requirements. This may result in backpressure, i.e. flow control needing to be implemented. Additionally, if there is a mismatch between input and output rates, this may require backpressure (flow control). In FIG. 14, the QOS is based upon a priority (C at high priority, and A at low priority). Now, using as an example, the multiple burst stream as illustrated in FIG. 13 as being sent to the target agent in FIG. 14 having queues A 1402, B 1404, and C 1406, the following is an explanation. At 1408 is represented what has been previously received into the queues A 1402, B 1404, and C 1406 and is now, for example, being transferred to a core. This sequence is A0, B0, C0, and C1. Now, sitting in the A 1402 low priority queue is A1 and A2. Backpressure is being applied for Alast 1402-1, the remaining (and last) part of burst A. Queue B 1404 has no backpressure and has received all of burst B (B0 having been transferred at 1408). Queue C 1406 has a high priority and is applying backpressure to Clast 1406-1 (the remaining and last part of burst C).

[0039] Queues that are servicing no-backpressure threads may be referred to as no-backpressure (NBP) queues and in turn do not exert any backpressure on the initiators that send requests to these queues. Queues servicing other threads may be referred to as backpressure (BP) queues.

[0040]FIG. 15 illustrates another embodiment 1500 of the present invention showing multiple queues (A, B, and C) handling a mixture of nonbackpressure (NBP) and backpressure (BP) threads. Queues A, B, and C may be considered part of an agent. Here, the thread serviced by queue C is assumed to be a no-backpressure thread, and so queue C becomes a no-backpressure queue. So queue C also does not apply any upstream backpressure. It is the system designer's responsibility to ensure that the nobackpressure queue does not overflow. This may be accomplished by various techniques, for example, by matching input and output rates, selecting an appropriate size for queue C 1506 (the high priority queue), etc. Note that backpressure is still needed for queue A 1502, a low priority queue, at 1502-1. As can been seen, at 1508 are queued elements that have been transferred by the agent.

[0041] It may be possible for an agent to “combine” two or more NBP queues, thereby saving resources. If the NBP queue has sufficient bandwidth, speed, resources, etc., then a single NBP queue may be able to handle multiple threads.

[0042]FIG. 16 illustrates another embodiment 1600 of the present invention showing multiple no-backpressure threads sharing a single no-backpressure queue. Threads B and C are both no-backpressure threads and are both handled by queue 1605. This queue is a no-backpressure queue. Note that backpressure is still needed for queue A 1602, a low priority queue, at 1602-1. As can be seen, at 1608 are queued elements that have been transferred by the agent.

[0043] One of ordinary skill in the art will appreciate that other and different queue types are also possible. These may be implemented by examining the connection identification, for example. Thus, a mixture of queues may be used to better serve a communication systems requirements. Simple queues may be a FIFO, more sophisticated queues may have scheduling algorithms and consist of memory and/or storage, etc. Many variations are possible.

[0044] Note that if the target core can handle the bandwidth of the multicast queue, then by having the target interface arbitration give preference to the multicast queue, it is possible to mix regular threads with multicast threads in the same target agent. A static division of threads into the multicast queue and regular queues may be achieved by, for example, using the top most bit in a connection ID. A connection ID is the thread identifier over the interconnect. The target core must not offer any backpressure to the multicast traffic.

[0045] As discussed previously, cores that may not be able to handle broadcasting may still be used with this system by mapping the incoming broadcast command into regular write commands. The same mapping mechanism may also be extended to include the address space as well. The agent acting on behalf of the target core is responsible for the mapping. Cascaded broadcasting may also be supported by passing the broadcast group information to the target core where further sub-broadcast groups can be defined and forwarded.

[0046] Thus, what has been disclosed is a method and apparatus for multicast handling in mixed core systems.

[0047] Referring back to FIG. 1, FIG. 1 illustrates a network environment 100 in which the techniques described may be applied. The network environment 100 has a network 102 that connects S servers 104-1 through 104-S, and C clients 108-1 through 108-C. As shown, several systems in the form of S servers 104-1 through 104-S and C clients 108-1 through 108-C are connected to each other via a network 102, which may be, for example, an on-chip communication network. Note that alternatively the network 102 might be or include one or more of: inter-chip communications, an optical network, the Internet, a Local Area Network (LAN), Wide Area Network (WAN), satellite link, fiber network, cable network, or a combination of these and/or others. The servers may represent, for example: a master device on a chip; a memory; an intellectual property core, such as a microprocessor, communications interface, etc.; a disk storage system; and/or computing resources. Likewise, the clients may have computing, storage, and viewing capabilities. The method and apparatus described herein may be applied to essentially any type of communicating means or device whether local or remote, such as a LAN, a WAN, a system bus, on-chip bus, etc. It is to be further appreciated that the use of the term client and server is for clarity in specifying who initiates a communication (the client) and who responds (the server). No hierarchy is implied unless explicitly stated. Both functions may be in a single communicating device, in which case the client-server and server-client relationship may be viewed as peer-to-peer. Thus, if two devices such as 108-1 and 104-S can both initiate and respond to communications, their communication may be viewed as peer-to-peer. Likewise, communications between 104-1 and 104-S, and 108-1 and 108-C may be viewed as peer to peer if each such communicating device is capable of initiation and response to communication.

[0048] Referring back to FIG. 2, FIG. 2 illustrates a system 200 in block diagram form, which may be representative of any of the clients and/or servers shown in FIG. 1. The block diagram is a high level conceptual representation and may be implemented in a variety of ways and by various architectures. Bus system 202 interconnects a Central Processing Unit (CPU) 204, Read Only Memory (ROM) 206, Random Access Memory (RAM) 208, storage 210, display 220, audio, 222, keyboard 224, pointer 226, miscellaneous input/output (I/O) devices 228, and communications 230. The bus system 202 may be for example, one or more of such buses as an on-chip bus, a system bus, Peripheral Component Interconnect (PCI), Advanced Graphics Port (AGP), Small Computer System Interface (SCSI), Institute of Electrical and Electronics Engineers (IEEE) standard number 1394 (FireWire), Universal Serial Bus (USB), etc. The CPU 204 may be a single, multiple, or even a distributed computing resource. Storage 210, may be Compact Disc (CD), Digital Versatile Disk (DVD), hard disks (HD), optical disks, tape, flash, memory sticks, video recorders, etc. Display 220 might be, for example, a Cathode Ray Tube (CRT), Liquid Crystal Display (LCD), a projection system, Television (TV), etc. Note that depending upon the actual implementation of the system, the system may include some, all, more, or a rearrangement of components in the block diagram. For example, an on-chip communications system on an integrated circuit may lack a display 220, keyboard 224, and a pointer 226. Another example may be a thin client might consist of a wireless hand held device that lacks, for example, a traditional keyboard. Thus, many variations on the system of FIG. 2 are possible.

[0049] For purposes of discussing and understanding the invention, it is to be understood that various terms are used by those knowledgeable in the art to describe techniques and approaches. Furthermore, in the description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be evident, however, to one of ordinary skill in the art that the present invention may be practiced without these specific details. In some instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring the present invention. These embodiments are described in sufficient detail to enable those of ordinary skill in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that logical, mechanical, electrical, and other changes may be made without departing from the scope of the present invention.

[0050] Some portions of the description may be presented in terms of algorithms and symbolic representations of operations on, for example, data bits within a computer memory. These algorithmic descriptions and representations are the means used by those of ordinary skill in the data processing arts to most effectively convey the substance of their work to others of ordinary skill in the art. An algorithm is here, and generally, conceived to be a self-consistent sequence of acts leading to a desired result. The acts are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical, magnetic, or optical signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.

[0051] It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise as apparent from the discussion, it is appreciated that throughout the description, discussions utilizing terms such as “processing” or “computing” or “calculating” or “determining” or “communicating” or “displaying” or the like, can refer to the action and processes of a computer system, or an electronic device, that manipulates and transforms data represented as physical (electronic) quantities within the electronic device or computer system's registers and memories into other data similarly represented as physical quantities within the electronic device and/or computer system memories or registers or other such information storage, transmission, or display devices.

[0052] The present invention can be implemented by an apparatus for performing the operations herein. This apparatus may be specially constructed for the required purposes, or it may comprise a general-purpose computer, selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer readable storage medium, such as, but not limited to, any type of disk including floppy disks, hard disks, optical disks, compact disk-read only memories (CD-ROMs), digital versatile disk (DVD), and magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs), electrically programmable read-only memories (EPROM)s, electrically erasable programmable read-only memories (EEPROMs), FLASH memories, magnetic or optical cards, etc., or any type of media suitable for storing electronic instructions either local to the computer or remote to the computer.

[0053] The algorithms and displays presented herein are not inherently related to any particular computer or other apparatus. Various general purpose systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct more specialized apparatus to perform the required method. For example, any of the methods according to the present invention can be implemented in hard-wired circuitry, by programming a general-purpose processor, or by any combination of hardware and software. One of ordinary skill in the art will immediately appreciate that the invention can be practiced with computer system configurations other than those described, including hand-held devices, multiprocessor systems, microprocessor-based or programmable consumer electronics, digital signal processing (DSP) devices, set top boxes, network PCs, minicomputers, mainframe computers, and the like. The invention can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. This communications network is not limited by size, and may range from, for example, on-chip communications to WANs such as the Internet.

[0054] The methods of the invention may be implemented using computer software. If written in a programming language conforming to a recognized standard, sequences of instructions designed to implement the methods can be compiled for execution on a variety of hardware platforms and for interface to a variety of operating systems. It will be appreciated that a variety of programming languages may be used to implement the teachings of the invention as described herein. Furthermore, it is common in the art to speak of software, in one form or another (e.g., program, procedure, application, driver, . . . ), as taking an action or causing a result. Such expressions are merely a shorthand way of saying that execution of the software by a computer causes the processor of the computer to perform an action or produce a result.

[0055] It is to be understood that various terms and techniques are used by those knowledgeable in the art to describe communications, protocols, applications, implementations, mechanisms, etc. One such technique is the description of an implementation of a technique in terms of an algorithm or mathematical expression. That is, while the technique may be, for example, implemented as executing code on a computer, the expression of that technique may be more aptly and succinctly conveyed and communicated as a formula, algorithm, or mathematical expression. Thus, one of ordinary skill in the art would recognize a block denoting A+B=C as an additive function whose implementation in hardware and/or software would take two inputs (A and B) and produce a summation output (C). Thus, the use of formula, algorithm, or mathematical expression as descriptions is to be understood as having a physical embodiment in at least hardware and/or software (such as a computer system in which the techniques of the present invention may be practiced as well as implemented as an embodiment).

[0056] A machine-readable medium is understood to include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer). For example, a machine-readable medium includes read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; electrical, optical, acoustical, or other form of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.); etc.

[0057] Thus, a method and apparatus for multicast handling in mixed core systems have been described. 

What is claimed is:
 1. A method comprising: receiving a request to create a broadcast group; and creating the broadcast group.
 2. The method of claim 1 wherein the broadcast group is encoded in an address.
 3. The method of claim 2 wherein the encoding in the address is in a group of contiguous address bits.
 4. The method of claim 1 further comprising transmitting the broadcast group.
 5. A processing system comprising a processor, which when executing a set of instructions performs the method of claim
 1. 6. A machine-readable medium having stored thereon instructions, which when executed performs the method of claim
 1. 7. An apparatus comprising: means for receiving a request to create a broadcast group; means for creating the broadcast group.
 8. The apparatus of claim 7 further comprising means for encoding the broadcast group.
 9. The apparatus of claim 8 further comprising means for encoding the broadcast group in an address.
 10. A machine-readable medium having stored thereon information representing the apparatus of claim
 7. 11. An apparatus comprising: an initiator with an output; a communications link having an input and an output, the input coupled to receive the initiator output; a plurality of targets each having an input and a register, each input coupled to receive the communications link output, and each register coupled to receive a bit pattern.
 12. The apparatus of claim 11 further comprising: the communications link having a second input and a second output; the initiator having an input, the input coupled to receive the communications link second output; and the plurality of targets each having an output, each output coupled to the communications link second input.
 13. A system comprising circuitry, which when operating, performs the following: receives an input signal; and compares the input signal to a broadcast group register.
 14. The system of claim 13 further comprising generating an output signal in response to the comparison.
 15. The system of claim 13 wherein the input signal is an address.
 16. The system of claim 15 wherein the comparison is to a subset of the full address.
 17. The system of claim 13 further comprising transferring a payment and/or a credit.
 18. A method comprising: receiving a broadcast group; and determining if a device is a member of the broadcast group.
 19. The method of claim 18 wherein the broadcast group is encoded in an address.
 20. The method of claim 19 wherein the encoding in the address is in a group of contiguous address bits.
 21. The method of claim 18 further comprising generating the broadcast group and transmitting the broadcast group.
 22. A processing system comprising a processor, which when executing a set of instructions performs the method of claim
 18. 23. A machine-readable medium having stored thereon instructions, which when executed performs the method of claim
 18. 24. An apparatus comprising: means for receiving a broadcast group; means for comparing the broadcast group.
 25. The apparatus of claim 24 further comprising means for decoding the broadcast group.
 26. The apparatus of claim 25 further comprising means for decoding the broadcast group in an address.
 27. A machine-readable medium having stored thereon information representing the apparatus of claim
 24. 28. A method comprising: receiving a multicast; and determining if the multicast is intended for a core; and if so, then transmitting the multicast within the core.
 29. The method of claim 28 where in transmitting the multicast within the core further comprises cascaded multicasting within the core.
 30. A processing system comprising a processor, which when executing a set of instructions performs the method of claim
 28. 31. A machine-readable medium having stored thereon instructions, which when executed performs the method of claim
 28. 32. An apparatus comprising: means for receiving a multicast; and means for determining if the multicast is intended for a core.
 33. The apparatus of claim 32 further comprising means for cascaded multicasting within the core.
 34. An apparatus comprising: a receiver having an input, an output, the input coupled to receive a group broadcast; a register having output contents; a comparator having a first input, a second input, and an output, the comparator coupled to receive the group broadcast on the first input, the comparator coupled to receive the register contents on the second, and the output generating a comparison signal; and a transmitter having an first input, a second input, and an output, the first input coupled to receive the group broadcast, the second input coupled to receive the comparison signal, the output having the group broadcast if the comparison signal indicates the broadcast group and register contents are equal.
 35. A machine-readable medium having stored thereon information representing the apparatus of claim
 34. 36. A method comprising: receiving a broadcast command from a first address space; and mapping the broadcast command to a new form selected from the group consisting of a write, and a second address space.
 37. The method of claim 36 further comprising mapping the write to an address space.
 38. The method of claim 36 wherein the second address space is a plurality of different address spaces.
 39. A processing system comprising a processor, which when executing a set of instructions performs the method of claim
 36. 40. A machine-readable medium having stored thereon instructions, which when executed performs the method of claim
 36. 41. An apparatus comprising: means for receiving a broadcast command from a first address space; and means for mapping the broadcast command to a new form selected from the group consisting of a write, and a second address space.
 42. A machine-readable medium having stored thereon information representing the apparatus of claim
 41. 43. A method comprising: defining a broadcast group; initializing broadcast group registers in a plurality of targets; (a) creating a request; (b) choosing a group; (c) sending the request to the group; and repeating (a) through (c) if other requests are pending.
 44. The method of claim 43 further comprising: defining a broadcast group; and initializing broadcast group registers in a plurality of targets.
 45. A processing system comprising a processor, which when executing a set of instructions performs the method of claim
 43. 46. A machine-readable medium having stored thereon instructions, which when executed performs the method of claim
 43. 47. An apparatus comprising: means for defining a broadcast group; means for initializing broadcast group registers in a plurality of targets; means for (a) creating a request, (b) choosing a group, (c) sending the request to the group; and means for repeating (a) through (c) if other requests are pending.
 48. A machine-readable medium having stored thereon information representing the apparatus of claim
 47. 49. A method comprising: extracting a broadcast group from a request; expanding the broadcast group into a bit vector; comparing the bit vector with a previously stored broadcast group register; determining if there is a match between the bit vector and the group register; and if so then, accepting the request.
 50. The method of claim 49 further comprising; examining a core capability; and determining if the core capability requires the accepted request to be reformatted by an operation selected from the group consisting of no reformatting needed, reformatting to match the core, reformatting for a cascaded broadcast, reformatting into a write command, reformatting into a different address space, reformatting into a different width.
 51. A processing system comprising a processor, which when executing a set of instructions performs the method of claim
 50. 52. A machine-readable medium having stored thereon instructions, which when executed performs the method of claim
 50. 53. An apparatus comprising: means for receiving a broadcast; means for examining a core capability; and means for determining if the received broadcast needs to be reformatted by an operation selected from the group consisting of no reformatting needed, reformatting to match the core, reformatting for a cascaded broadcast, reformatting into a write command, reformatting into a different address space, reformatting into a different width.
 54. A machine-readable medium having stored thereon information representing the apparatus of claim
 53. 55. A method comprising: receiving a nobackpressure thread; and receiving a backpressure thread.
 56. The method of claim 55 further comprising receiving said threads in a single queue.
 57. The method of claim 56 wherein said threads may be received in any order.
 58. The method of claim 55 further comprising receiving the nobackpressure thread in a nobackpressure queue, and receiving the backpressure thread in a backpressure queue.
 59. The method of claim 58 wherein said threads may be received in any order.
 60. The method of claim 55 wherein said receiving further comprises receiving over a single interface.
 61. The method of claim 55 further comprising a connection identification to identify said threads.
 62. The method of claim 55 further comprising receiving a plurality of nobackpressure threads.
 63. The method of claim 62 wherein two or more of the plurality of nobackpressure threads are received in a single queue.
 64. The method of claim 62 wherein two or more of the plurality of nobackpressure threads are received by a single queue.
 65. The method of claim 55 further comprising receiving a burst of requests through a nobackpressure queue.
 66. The method of claim 55 further comprising receiving multiple bursts of requests and accepting them into a backpressure queue and nobackpressue queue.
 67. A processing system comprising a processor, which when executing a set of instructions performs the method of claim
 55. 68. A machine-readable medium having stored thereon instructions, which when executed performs the method of claim
 55. 69. A method comprising: sending a nobackpressure thread; and sending a backpressure thread.
 70. The method of claim 69 wherein said sending further comprises sending over a single interface.
 71. A processing system comprising a processor, which when executing a set of instructions performs the method of claim
 69. 72. A machine-readable medium having stored thereon instructions, which when executed performs the method of claim
 69. 73. An apparatus comprising: means for receiving a nobackpressure thread; and means for receiving a backpressure thread.
 74. The apparatus of claim 73 further comprising a connection identification means to identify said nobackpressure and backpressure threads.
 75. A machine-readable medium having stored thereon information representing the apparatus of claim
 73. 76. An apparatus comprising: a first queue having an input and an output, the input coupled to receive nobackpressure communications; a second queue having an input and an output, the input coupled to receive backpressure communications; a receiver having a first input and a second input, the first input coupled to receive the first queue output, the second input coupled to receive the second queue output.
 77. The apparatus of claim 76 wherein the nobackpressure communications further comprises a plurality of mixed threads.
 78. The apparatus of claim 76 further comprising a transmitter having an output for sending payment and/or a credit information. 